Multiple line and device levels in an integrated circuit are typically separated by insulating dielectric layers. Contact opening, more simply referred to as "contacts," are formed through the insulating layers to provide electrical contact between two or more conductive layers. The insulating layers must be grown or deposited to a minimum thickness. Too thin an insulating layer results in an intolerably high interlevel capacitance, which ties up otherwise available conduction carriers. Thus, as dimensions continue to be scaled down to the submicron level, the contact opening shrinks in size but the depth of the contact (through an insulating layer) must remain the same. In other words, the aspect ratio of contact openings increases as circuitry becomes more densely packed.
FIG. 1 illustrates a prior art conductive layer 3 deposited into a contact opening 4 to provide the interlevel electrical contact. It should be understood that FIG. 1 is a schematic cross-sectional view, omitting the backwall for simplicity, but that the contact 4 is ordinarily etched in the shape of a cylinder. Unfortunately, physical vapor deposition of the conductive layer 3, such as metal sputtering and evaporation, produces poor step coverage into narrow contact openings having high aspect ratios. During a metal sputter deposition, for example, metal builds quickly on a lip 5 of the contact 4. A lower corner 6 of the contact 4, in contrast, has very thin metal coverage. This thin layer is subject, during circuit operation, to high resistance and electromigration. Electromigration is the motion of metal ions in response to high density current flow, which can even further thin the metal coverage at a bottom 7 of the contact 4 by piling up the metal ions in some regions while forming voids elsewhere, leading to breakage of the metal layer and open circuits. Adding small amounts of copper (Cu) to aluminum films somewhat diminishes but cannot eliminate the effect of electromigration where poor step coverage produces excessively thin aluminum films.
Quick build-up of sputtered metal on the lip 5 of the contact 4, and the resultant poor step coverage, is produced in part and compounded by a shadow effect at a vertical sidewall 8. The faster deposition of metal on the contact lip 5 creates a bulge into the mouth of the contact 4, sheltering the lower portions and thus even further slowing down deposition in the lower comer 6 of the contact 4. Eventually, the metal may pinch off at the contact mouth before significant metal is deposited in the lower comer 6. Where the contact has an aspect ratio of 1.0 or greater (contact height is equal to or greater than the diameter of the opening) the deposited metal is especially susceptible to pinching off and closing the contact. Voids or "keyholes" are thus created in filling the contact.
One method of improving step coverage involves a process of sloping the sidewall of the contact, thus opening the contact in a tapered or cone shape. The minimum diameter of the bottom of the contact, however, is still limited by photolithographic resolution. Sloping the contact sidewall thus increases the total area occupied by the contact and reduces the allowable packing density. Such decreases in packing density are unacceptable in the face of current commercial requirements for the miniaturization of integrated circuits.
Conductive plugs, which completely fill the contact, have been implemented to eliminate the problem of voids and poor step coverage created by sputter-depositing metals into high aspect-ratio vertical contacts. Chemical vapor deposition (CVD) must generally be used for this process, and tungsten (W) is most often the material used for the plug. Tungsten and the process required for its deposit, however, arc expensive compared to conventional sputter-deposited metals.
Tungsten demonstrates higher sheet resistivity than aluminum or other conventional metal interconnects. Thus, tungsten plugs should be used in conduction with lower resistance metal runners, such as alumninum. Separate chambers are required for the metal runner depositions, and for the tungsten plug CVD after contact formation. An adhesion layer is required for efficient deposition into the contact, due to poor adhesion of CVD tungsten to insulating materials in which the contact is formed. On the other hand, poor adhesion may remain in other areas, such as the wafer backside, so that an unwanted tungsten film may delaminate and contaminate the chamber.
In order to use tungsten plugs in conduction with low-resistance metal runners, the tungsten should remain only in the contact, rather than over the entire wafer. If the CVD tungsten is blanket-deposited, a planarizing etchback of the tungtsten is necessary to remove the excess tungsten over the insulating layer prior to aluminum deposition, for example. The etchback requires both a sacrificial layer and an etch process with a 1:1 etch rate ratio for the sacrificial layer and the tungsten. Seeding and selective deposit also requires an etchback step if contacts of different depths are to be filled simulataneously. These requirements make tungsten plugs expensive and difficult to reliably construct. Depositing polysilicon plugs entails similar problems, including high sheet resistivity and the resultant need for additional process steps in providing metal lines over the polysilicon plugs. Additionally, polysilicon plugs often require doping to avoid high contact resistance with underlying doped materials.
It would thus be advantageous to find alternate methods of providing good step coverage into contacts, utilizing conductive materials with lower resistivity, such as aluminum. In this way, conductive runners may be formed simultaneously with the interlevel contact within the opening.
One method of completely filling contacts with aluminum or other metals having low resistance is through bias sputtering. However, the high temperatures associated with this process tend to cause undesirable effects, as is well-known in this art, such as damage to the single-crystal substrate, or formation of large aluminum-copper grains which are difficult to etch. On the other hand, conducting the process at lower temperatures has resulted in excessive electromigration.
Much attention has recently been paid to laser planarization of aluminum layers. For example, U.S. Pat. No. 5,032,233, issued to Yu et al., U.S. Pat. No. 5,066,611, issued to Yu, U.S. Pat. No. 5,147,819, issued to Yu et al., and U.S. Pat. No. 5,124,780, issued to Sandhu et al., all disclose improved methods of laser planarization. An aluminum film is irradiated with a pulsed laser, heating the metal to a molten state which may flow and completely fill the contact. The metal layer naturally becomes planarized by this process. An anti-reflective coating, however, is required to efficiently transfer the laser energy to the aluminum, which would otherwise reflect over 80% of the laser energy impinged upon it. Additionally, a very small process window is available in which enough energy is transferred to melt the aluminum without evaporation or other damage to the wafer.
A need thus remains for an efficient method of filling contacts with good step coverage for forming interlevel electrical contact. Advantageously, such a method would also be compatible with conventional sputter deposition techniques, allowing for simultaneous provision of a metallization or interconnect level so as to minimize process steps and cost.